, MIPS의 CPU가 코드를 작성하고 Verilog 언어를 사용하여 추가 지시가, 예를 들면 : selecttion 정렬 instruction.The 코드 조합 회로와 포함될 sequenial circuit.CPU contai 갖고있다




File list:
signal_cpu_sort
..............\Add.v
..............\Alu.v
..............\Alu_control.v
..............\Control.v
..............\Data_memory.v
..............\Instruction_memory.v
..............\Line_control.v
..............\Pc.v
..............\Registers.v
..............\Sign_extend.v
..............\Single_cycle_cpu.v
..............\test.prj
..............\test.v
..............\testbranch.v