베릴로그 개발을 위한 fft 디자인(translate from):fft design for development in verilog
File list:
fft_design_b.tech
................\61i_radix2_xfft1024_v2_0_ver_ise
................\................................\iseconfig
................\................................\.........\61i_radix2_xfft1024_v2_0_ver.projectmgr
................\................................\.........\design_top.xreport
................\................................\xst
................\................................\...\dump.xst
................\................................\...\........\design_top.prj
................\................................\...\........\..............\ngx
................\................................\...\........\..............\...\notopt
................\................................\...\........\..............\...\opt
................\................................\...\projnav.tmp
................\................................\...\work
................\................................\...\....\vlg29
................\................................\...\....\.....\my__radix2__xfft1024.bin
................\................................\...\....\vlg54
................\................................\...\....\.....\design__top.bin
................\................................\...\....\hdllib.ref
................\................................\_xmsgs
................\................................\......\pn_parser.xmsgs
................\................................\......\xst.xmsgs
................\................................\61i_radix2_xfft1024_v2_0_ver.gise
................\................................\61i_radix2_xfft1024_v2_0_ver.npl
................\................................\61i_radix2_xfft1024_v2_0_ver.xise
................\................................\61i_radix2_xfft1024_v2_0_ver_ise12migration.zip
................\................................\coregen.cgc
................\................................\coregen.cgp
................\................................\coregen.log
................\................................\coregen.rsp
................\................................\design_top.cmd_log
................\................................\design_top.lso
................\................................\design_top.ngc
................\................................\design_top.ngr
................\................................\design_top.prj
................\................................\design_top.stx
................\................................\design_top.syr
................\................................\design_top.ucf
................\................................\design_top.v
................\................................\design_top.xst
................\................................\design_top_dc_input_tb.tf
................\................................\design_top_envsettings.html
................\................................\design_top_summary.html
................\................................\design_top_tb.tf
................\................................\design_top_tb_tf.udo
................\................................\design_top_xst.xrpt
................\................................\my_radix2_xfft1024.edn
................\................................\my_radix2_xfft1024.ngo
................\................................\my_radix2_xfft1024.v
................\................................\my_radix2_xfft1024.veo
................\................................\my_radix2_xfft1024.xco
................\................................\my_radix2_xfft1024.xco.bak
................\................................\my_radix2_xfft1024_fft20_flow_control_c_1.ngc
................\................................\README_ISE.TXT
................\................................\sine_9_375mhz.dat
................\................................\webtalk_pn.xml
................\................................\wrapped_fft20_sin_cos_TRIG_ROM.mif
................\61i_radix2_xfft1024_v2_0_ver_ise.zip